As the information processing devices are miniaturized and the processing speed thereof is improved, semiconductor devices are required to be miniaturized as well. A laminated semiconductor chip is known as a semiconductor chip which meets the miniaturization request of semiconductor devices. Since the laminated semiconductor chip has a three-dimensional structure, an effective mounting density may be improved while suppressing enlargement of a mounting area. In addition, since a wiring that interconnects laminated semiconductor chips is becoming shortened, the laminated semiconductor chip also contributes to enhancement of operation speed and reduction of power consumption.
Related techniques are disclosed in, for example, Japanese Laid-Open Patent Publication No. H07-085756.